From 4040cc755b9b84e356288f96bb27fb3403b7a928 Mon Sep 17 00:00:00 2001 From: rtoy <rtoy> Date: Tue, 6 Jan 2009 00:06:46 +0000 Subject: [PATCH] o Move the 10.4 macro definitions outside the function. They're used in other functions too! o Add in the SSE2 mxcsr register only if we're running an SSE2-enabled core. --- lisp/Darwin-os.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/lisp/Darwin-os.c b/lisp/Darwin-os.c index e6111c32a..c124ed60e 100644 --- a/lisp/Darwin-os.c +++ b/lisp/Darwin-os.c @@ -14,7 +14,7 @@ * Frobbed for OpenBSD by Pierre R. Mai, 2001. * Frobbed for Darwin by Pierre R. Mai, 2003. * - * $Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/lisp/Darwin-os.c,v 1.24 2008/12/29 14:40:34 rtoy Exp $ + * $Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/lisp/Darwin-os.c,v 1.25 2009/01/06 00:06:46 rtoy Rel $ * */ @@ -197,9 +197,6 @@ sc_reg(os_context_t * context, int offset) return (int *) 0; } #elif defined(__i386__) -unsigned long * -os_sigcontext_reg(ucontext_t *scp, int index) -{ #if __DARWIN_UNIX03 /* Nothing needed for 10.5 */ #else @@ -227,6 +224,10 @@ os_sigcontext_reg(ucontext_t *scp, int index) #define __fpu_fsw fpu_fsw #define __fpu_mxcsr fpu_mxcsr #endif + +unsigned long * +os_sigcontext_reg(ucontext_t *scp, int index) +{ switch (index) { case 0: return (unsigned long *) &scp->uc_mcontext->__ss.__eax; @@ -301,11 +302,13 @@ os_sigcontext_fpu_modes(ucontext_t *scp) DPRINTF(0, (stderr, "FPU modes = %08x (sw = %4x, cw = %4x)\n", modes, (unsigned int) sw, (unsigned int) cw)); - mxcsr = scp->uc_mcontext->__fs.__fpu_mxcsr; - DPRINTF(0, (stderr, "SSE2 modes = %08x\n", mxcsr)); - - modes |= mxcsr; + if (fpu_mode == SSE2) { + mxcsr = scp->uc_mcontext->__fs.__fpu_mxcsr; + DPRINTF(0, (stderr, "SSE2 modes = %08x\n", mxcsr)); + modes |= mxcsr; + } + DPRINTF(0, (stderr, "modes pre mask = %08x\n", modes)); /* Convert exception mask to exception enable */ -- GitLab