From cea9f1f6f02b35d8452c4e2b32e14b286e9ef24d Mon Sep 17 00:00:00 2001 From: toy <toy> Date: Mon, 27 Oct 2003 18:29:35 +0000 Subject: [PATCH] Define ldsw and lduw instructions appropriate for v9 and non-v9: o For v9, ldsw -> ldsw, lduw -> ld o For others, ldsw and lduw -> ld. --- compiler/sparc/insts.lisp | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/compiler/sparc/insts.lisp b/compiler/sparc/insts.lisp index ebda2ca63..0c2d617b6 100644 --- a/compiler/sparc/insts.lisp +++ b/compiler/sparc/insts.lisp @@ -5,7 +5,7 @@ ;;; Carnegie Mellon University, and has been placed in the public domain. ;;; (ext:file-comment - "$Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/compiler/sparc/insts.lisp,v 1.47 2003/10/18 14:05:50 toy Exp $") + "$Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/compiler/sparc/insts.lisp,v 1.48 2003/10/27 18:29:35 toy Exp $") ;;; ;;; ********************************************************************** ;;; @@ -1114,7 +1114,24 @@ about function addresses and register values.") (define-f3-inst ld #b11 #b000000 :load-store :load #+sparc-v9 :print-name #+sparc-v9 'lduw) -(define-f3-inst ldsw #b11 #b001000 :load-store :load) ; v9 +;; The code sometimes uses ldsw and lduw. LDSW is a real instruction +;; for V9 that sign-extends a 32-bit load. LDUW is the same as LD. +;; For non-V9, we define macros to replace these with the equivalent +;; instruction (LD) since sign-extending and zero-extending a 32-bit +;; value in a 32-bit register is the same. +#+sparc-v9 +(progn + (define-f3-inst ldsw #b11 #b001000 :load-store :load) ; v9 + (define-instruction-macro lduw (&rest args) + `(inst ld ,@args))) + +#-sparc-v9 +(progn + (define-instruction-macro ldsw (&rest args) + `(inst ld ,@args)) + (define-instruction-macro lduw (&rest args) + `(inst ld ,@args))) + ;; ldd is deprecated on the Sparc V9. (define-f3-inst ldd #b11 #b000011 :load-store :load) -- GitLab