diff --git a/src/lisp/arch.h b/src/lisp/arch.h index b8ebf3f2a5378b59999a339f53672d0aafd44faa..3c6dd9f55732be2000babfcafd913a14cc8491a6 100644 --- a/src/lisp/arch.h +++ b/src/lisp/arch.h @@ -30,18 +30,28 @@ extern lispobj funcall2(lispobj function, lispobj arg0, lispobj arg1); extern lispobj funcall3(lispobj function, lispobj arg0, lispobj arg1, lispobj arg2); +extern void arch_make_linkage_entry(long, void *, long); +extern long arch_linkage_entry(unsigned long); +void arch_make_lazy_linkage(long linkage_entry); +long arch_linkage_entry(unsigned long retaddr); + + extern void fpu_save(void *); extern void fpu_restore(void *); extern void sse_save(void *); extern void sse_restore(void *); +extern void save_fpu_state(void*); +extern void restore_fpu_state(void*); -extern void arch_make_linkage_entry(long, void *, long); -extern long arch_linkage_entry(unsigned long); -void arch_make_lazy_linkage(long linkage_entry); -long arch_linkage_entry(unsigned long retaddr); +#if defined(i386) || defined(__x86_64) +#include "x86-arch.h" +#endif -#ifdef i386 -extern int arch_support_sse2(void); +#if defined(DARWIN) && defined(__ppc__) +#include "ppc-arch.h" #endif +#if defined(sparc) +#include "sparc-arch.h" +#endif #endif /* __ARCH_H__ */ diff --git a/src/lisp/os.h b/src/lisp/os.h index c99647481fd43f5594b8e7f967bb4b652e855957..5d4344658a2de852742f252aa44a8a12966f3446 100644 --- a/src/lisp/os.h +++ b/src/lisp/os.h @@ -116,45 +116,6 @@ unsigned long *os_sigcontext_pc(ucontext_t *); unsigned char *os_sigcontext_fpu_reg(ucontext_t *, int); unsigned int os_sigcontext_fpu_modes(ucontext_t *); -#ifdef i386 -extern boolean os_support_sse2(void); -#endif - char* convert_lisp_string(char* c_string, void* lisp_string, int len); -/* - * Define macro to allocate a local array of the appropriate size - * where the fpu state can be stored. - */ -#if defined(i386) || defined(__x86_64) -#define FPU_STATE_SIZE 27 - /* - * Need 512 byte area, aligned on a 16-byte boundary. So allocate - * 512+16 bytes of space and let the routine adjust use the - * appropriate alignment. - */ -#define SSE_STATE_SIZE ((512+16)/4) - -/* - * Just use the SSE size for both x87 and sse2 since the SSE size is - * enough for either. - */ -#define FPU_STATE(name) int name[SSE_STATE_SIZE]; - -#elif defined(sparc) -/* - * 32 (single-precision) FP registers, and the FP state register. - * But Sparc V9 has 32 double-precision registers (equivalent to 64 - * single-precision, but can't be accessed), so we leave enough room - * for that. - */ -#define FPU_STATE_SIZE (((32 + 32 + 1) + 1)/2) -#define FPU_STATE(name) long long name[FPU_STATE_SIZE]; -#elif defined(DARWIN) && defined(__ppc__) -#define FPU_STATE_SIZE 32 -#define FPU_STATE(name) long long name[FPU_STATE_SIZE]; -#endif -extern void save_fpu_state(void*); -extern void restore_fpu_state(void*); - #endif /* _OS_H_ */ diff --git a/src/lisp/ppc-arch.h b/src/lisp/ppc-arch.h new file mode 100644 index 0000000000000000000000000000000000000000..c4698a73331a9798478dcf8bdf412940ad0ac02b --- /dev/null +++ b/src/lisp/ppc-arch.h @@ -0,0 +1,19 @@ +/* + + This code was written as part of the CMU Common Lisp project and has + been placed in the public domain. + +*/ +#ifndef __PPC_ARCH_H +#define __PPC_ARCH_H + +/* + * Define macro to allocate a local array of the appropriate size + * where the fpu state can be stored. + * + * PPC has 32 (double-precision) floating-point registers. + */ +#define FPU_STATE_SIZE 32 +#define FPU_STATE(name) long long name[FPU_STATE_SIZE]; + +#endif diff --git a/src/lisp/sparc-arch.h b/src/lisp/sparc-arch.h new file mode 100644 index 0000000000000000000000000000000000000000..3a983840530c534d16d97cce5bbc2cf6ce276d44 --- /dev/null +++ b/src/lisp/sparc-arch.h @@ -0,0 +1,23 @@ +/* + + This code was written as part of the CMU Common Lisp project and has + been placed in the public domain. + +*/ +#ifndef __SPARC_ARCH_H +#define __SPARC_ARCH_H + +/* + * Define macro to allocate a local array of the appropriate size + * where the fpu state can be stored. + * + * + * 32 (single-precision) FP registers, and the FP state register. + * But Sparc V9 has 32 double-precision registers (equivalent to 64 + * single-precision, but can't be accessed), so we leave enough room + * for that. + */ +#define FPU_STATE_SIZE (((32 + 32 + 1) + 1)/2) +#define FPU_STATE(name) long long name[FPU_STATE_SIZE]; + +#endif diff --git a/src/lisp/x86-arch.h b/src/lisp/x86-arch.h new file mode 100644 index 0000000000000000000000000000000000000000..8314063fd916177cfd89f3b6951704998d6ec3ff --- /dev/null +++ b/src/lisp/x86-arch.h @@ -0,0 +1,32 @@ +/* + + This code was written as part of the CMU Common Lisp project and has + been placed in the public domain. + +*/ +#ifndef __X86_ARCH_H + +extern int arch_support_sse2(void); +extern boolean os_support_sse2(void); + +/* + * Define macro to allocate a local array of the appropriate size + * where the fpu state can be stored. + */ + +#define FPU_STATE_SIZE 27 + +/* + * Need 512 byte area, aligned on a 16-byte boundary. So allocate + * 512+16 bytes of space and let the routine adjust the appropriate + * alignment. + */ +#define SSE_STATE_SIZE ((512+16)/4) + +/* + * Just use the SSE size for both x87 and sse2 since the SSE size is + * enough for either. + */ +#define FPU_STATE(name) int name[SSE_STATE_SIZE]; + +#endif