Skip to content
GitLab
Explore
Sign in
Register
Primary navigation
Search or go to…
Project
cmucl
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Service Desk
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Terms and privacy
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Carl Shapiro
cmucl
Commits
8409d97b
Commit
8409d97b
authored
20 years ago
by
cwang
Browse files
Options
Downloads
Patches
Plain Diff
make sure r11 is a temporary register for non-inline allocation
parent
e641984b
No related branches found
No related tags found
No related merge requests found
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
compiler/amd64/macros.lisp
+4
-5
4 additions, 5 deletions
compiler/amd64/macros.lisp
with
4 additions
and
5 deletions
compiler/amd64/macros.lisp
+
4
−
5
View file @
8409d97b
...
@@ -7,7 +7,7 @@
...
@@ -7,7 +7,7 @@
;;; Scott Fahlman or slisp-group@cs.cmu.edu.
;;; Scott Fahlman or slisp-group@cs.cmu.edu.
;;;
;;;
(
ext:file-comment
(
ext:file-comment
"$Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/compiler/amd64/macros.lisp,v 1.
4
2004/07/1
4 20:58:45
cwang Exp $"
)
"$Header: /Volumes/share2/src/cmucl/cvs2git/cvsroot/src/compiler/amd64/macros.lisp,v 1.
5
2004/07/1
5 17:57:54
cwang Exp $"
)
;;;
;;;
;;; **********************************************************************
;;; **********************************************************************
;;;
;;;
...
@@ -212,6 +212,8 @@
...
@@ -212,6 +212,8 @@
;; C call to allocate via dispatch routines. Each destination has a
;; C call to allocate via dispatch routines. Each destination has a
;; special entry point. The size may be a register or a constant.
;; special entry point. The size may be a register or a constant.
;; This is used only if space is more important than speed.
;; This is used only if space is more important than speed.
;; Since linkage table will trash r11, the easiest solution is to make sure temp-tn is r11
(
assert
(
=
(
tn-offset
temp-tn
)
#.
r11-offset
))
(
ecase
(
tn-offset
alloc-tn
)
(
ecase
(
tn-offset
alloc-tn
)
(
#.
rax-offset
(
#.
rax-offset
(
load-size
alloc-tn
rax-tn
size
)
(
load-size
alloc-tn
rax-tn
size
)
...
@@ -249,10 +251,7 @@
...
@@ -249,10 +251,7 @@
(
load-size
alloc-tn
r10-tn
size
)
(
load-size
alloc-tn
r10-tn
size
)
(
inst
mov-imm
temp-tn
(
make-fixup
(
extern-alien-name
"alloc_to_r10"
)
(
inst
mov-imm
temp-tn
(
make-fixup
(
extern-alien-name
"alloc_to_r10"
)
:foreign
)))
:foreign
)))
(
#.
r11-offset
;; no r11
(
load-size
alloc-tn
r11-tn
size
)
(
inst
mov-imm
temp-tn
(
make-fixup
(
extern-alien-name
"alloc_to_r11"
)
:foreign
)))
(
#.
r12-offset
(
#.
r12-offset
(
load-size
alloc-tn
r12-tn
size
)
(
load-size
alloc-tn
r12-tn
size
)
(
inst
mov-imm
temp-tn
(
make-fixup
(
extern-alien-name
"alloc_to_r12"
)
(
inst
mov-imm
temp-tn
(
make-fixup
(
extern-alien-name
"alloc_to_r12"
)
...
...
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment